Verification Engineer

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Markham, ON

Department:

Engineering

Posted:

8/24/2021

Type:

Contract

Job Title: Verification Engineer
Job ID: JD973481823

The Verification Engineer will carry out functional verification in the physical layer of high-speed I/O and Interconnect-related IPs for chiplet-based SoC architectures, as part of a larger team of design and verification engineers. 

Responsibilities: 
  • Documenting and executing test plans consisting of directed and constrained-random testing, utilizing a combination of modern, commonly-used industry-standard and proprietary methodologies and tools, within the existing verification infrastructure based on currently active projects. 
  • Hardware modeling, developing verification environments, employing assertion-based verification and functional coverage, and selected use of advanced formal verification would be used as applicable. 
Experience and Education: 
  • 7 or more years of proven verification experience on large ASIC development projects 
  • Strong background in SystemVerilog/UVM development in a Linux Environment 
  • Knowledge of common scripting languages such as Perl, Python, Ruby, etc. 
  • Background in one or more I/O or Interconnect protocols such PCI Express, CXL, CCIX, Gigabit Ethernet, USB4, etc. 
  • Experience with designs utilizing SerDes/PHYs 
  • Strong analytical/debug skills and attention to detail 
  • Excellent written and communication skills 
  • Exemplary teamwork and interpersonal skills
Please note: Candidates need to be authorized to work in Canada and available for interviews in Canada. 


For more information about TEEMA and to consider other career opportunities, please visit our website at www.teemagroup.com

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